The University of Hawaiʻi’s Information Technology Services Cyberinfrastructure will host the Intel Xeon Phi training workshop at the Information Technology Center. The workshop is free and open to UH faculty, staff and students and funds are available for traveling and hotel accommodation from the neighbor islands.

This workshop is an introduction to the Xeon Phi for programmers and non-programmers alike. It includes an overview of the device and the three primary programming/execution models that target the Many Integrated Core architecture.

In addition to instructor demonstrations, the workshop includes two hands-on lab sessions: a basic lab that amounts to a tour of the Xeon Phi and a more advanced session during which participants can explore the programming models that interest them.

The workshop will cover basic architecture of Intel Xeon Phi and Stampede cluster. Introduction to using Intel Xeon Phi will be divided into sections for both novice and advanced programmers starting from basic usage and automatic offload to native, symmetric and offload execution models.

The second day of the workshop will be devoted to exploring best practices for porting existing code to Intel Xeon Phis and will continue with two lecture sessions and advanced lab. Participants are welcome to spend this time with the tutors discussing options for porting their own codes.

For more information regarding agenda, tutors and registration, go to


The Intel Xeon Phi Training Workshop is a collaboration with the UH’s Information Technology Services Cyberinfrastructure, Clemson University Cyberinfrastructure Technology Integration Group and the Texas Advanced Computing Center at the University of Texas. Funding is made possible by the National Science Foundation.

A University of Hawaiʻi Information Technology Services news release